Back to the Future: Rethinking EDA Infrastructure for Agentic Systems in Chip Design Verification· 面向未来的 EDA 基础设施
The unprecedented computational scale of modern artificial intelligence depends on complex, multi-billion-transistor Systems-on-Chip, yet the workflows that verify these chips remain stubbornly manual. Although Large Language Models (LLMs) have made rapid inroads into Electronic Design Automation (EDA), approximately 74.6% of existing studies target static Register-Transfer Level (RTL) code generation, leaving post-simulation verification and interactive waveform debugging largely untouched. We introduce Back-to-the-Future (BTTF), an end-to-end agentic framework that closes this infrastructural gap. BTTF distills massive, unstructured simulation dumps into a normalized relational SQLite database and couples it with a collaborative multi-agent orchestration engine that translates natural-la
面向未来的 EDA 基础设施，通过多智能体框架优化芯片设计验证流程。
- 核心方法
- 引入 Back-to-the-Future (BTTF) 框架，将大规模仿真数据转化为规范化的关系型 SQLite 数据库，并通过多智能体协同引擎实现自然语言交互的自动化验证。
- 适合谁读
- 研究者、工程师
- 要解决的问题
- 现有的 EDA 验证工作流过于手工化，且大部分研究集中于静态 RTL 代码生成，忽视了后仿真验证和交互式波形调试。
- 关键实验
- 未提供
- 主要贡献
- 实现了从数据处理到验证的全流程自动化，大幅提升了芯片设计验证的效率和可操作性。
- 意义与局限
- BTTF 框架有望改变现有 EDA 验证流程，减少人工干预，提高设计质量。但其在实际应用中的效果和稳定性仍需进一步验证。